[FPGA series starting from 0] LED water lamp experiment under Quartus13.1

       catalogue 1. Experimental purpose 2. Preparation stage 3. Establish project 4. Create Verilog HDL File 5. Preparation of program code 6. Configure corresponding pins   7. Program Download Board 8. Curing program to Flash          Statement: the FPGA development board I bought is Hei ...

Posted by ozman26 on Fri, 03 Dec 2021 02:11:00 -0800

UART serial communication protocol

1, Communication characteristics Asynchronous, serial, full duplex Generally, the characteristics of a communication are: synchronous / asynchronous, serial / parallel, half duplex / full duplex Synchronization: one chip is required to control the timing of another chip. Generally, at least one bus connection is adopted between the two to co ...

Posted by sathyan on Mon, 29 Nov 2021 16:54:35 -0800

Three communication protocols SPI -- register configuration

catalogue 1, Introduction to SPI communication protocol 2, SPI communication timing 1. Master slave communication 2. Mode selection 3, Instance summary 1, Introduction to SPI communication protocol      SPI is the abbreviation of serial peripheral interface. It is a synchronous serial interface technology launched ...

Posted by murali on Fri, 19 Nov 2021 14:04:20 -0800

Verilog HDLBits phase III: 2.2Vectors

catalogue preface 2.2.1Vectors(Vector0) Solution: 2.2.2Vectors in more detail(Vector1) A Bit of Practice: Solution: 2.2.3Vector part select(Vector2) Solution: 2.2.4Bitwise operators(Vectorgates) Solution: 2.2.5Four-input gates(Gates4) Solution: 2.2.6Vector concatenation operator(Vector3) A Bit of Practice: Solution: 2.2. ...

Posted by fanfavorite on Sun, 07 Nov 2021 10:02:32 -0800

RT thread + esp8266 WiFi module development on hummingbird processor

This paper introduces the RT thread real-time operating system running on hummingbird processor and the development of ESP8266 wifi module. Transplantation of RT thread is provided in the supporting sdk of hummingbird https://github.com/riscv-mcu/hbird-sdk/tree/0.1.2/application/rtthread/msh , we only need to carry out specific application dev ...

Posted by stargate03 on Mon, 01 Nov 2021 07:59:01 -0700

Temperature alarm system based on FPGA (12864 display, audible and visual alarm)

Temperature alarm system based on FPGA (12864 display, audible and visual alarm) preface In this experiment, the DS18B20 is driven by FPGA to collect the temperature in real time and display it on the LCD screen 12864. At the same time, the specified temperature can be set by pressing the key. When the actual temperature is lower than t ...

Posted by fotofx on Tue, 12 Oct 2021 18:17:10 -0700

Full record of HDLBits questions

Procedures Before the beginning of this section, common statements are divided into comprehensible and non comprehensible. In short, comprehensible is the statement that can form a hardware circuit, while non comprehensible is the statement that can only be used for simulation. categorysentenceIntegrabilityProcedure statementinitiala ...

Posted by daveoliveruk on Tue, 12 Oct 2021 13:19:42 -0700

Several Tcl commands for clock operation in Vivado

preface Theoretically, Tcl can complete all operations on Vivado, but it is not necessary. Because there are too many commands, it is difficult to remember. We only need to know a few commonly used commands to facilitate our use of Vivado. For timing constraints, most of our commonly used tcl commands are clock related, because constraints ar ...

Posted by imnsi on Thu, 07 Oct 2021 08:49:34 -0700

Detailed use of the strongest OSERDES IP core; Analysis of the structure of the GA--IO Parallel to Serial Conversion Resource OSERDES

First raise a few questions: 1. What is OSERDES? What is the function of OSERDES? Use scenarios? 2. What is the structure of OSERDES? What ports are there? What are the port properties? 3.OSERDES parameter property description? 4. How do OSERDES bit extensions work? 5. What is the OSERDES timing, latency, 3-state control? 6. What to do with ti ...

Posted by matrixd on Wed, 29 Sep 2021 10:08:47 -0700

MIZ7035 PCIe test RIFFA [PCIE video transmission]

1. Preface           MIZ7035 officially provides two kinds of pcie demo s, one is the ordinary PIO test and the other is the BMD test. I just tested the PIO function, which can read and write IO registers directly to the board. Another BMD function uses DMA to speed up data reading and writing. &nbs ...

Posted by ambrennan on Mon, 27 Sep 2021 17:41:07 -0700