An example of getting started with ZYNQ -- timer interruption and program solidification

I. Preface In the APU system, the CPU performs the operation in the way of serial code execution, and the software mode is difficult to achieve accurate timing, so it is a better choice to call the internal timer hardware to complete timing. In this paper, timer interrupt control LED periodic flicker as an example to learn the use of private ti ...

Posted by shumway on Sun, 08 Mar 2020 04:30:32 -0700

System Verilog builds APB ﹣ I2C IP hierarchical verification platform

I. Preface Recently, the epidemic is serious. As a social animal, I can only continue to study technology at home. I wrote a blog about building a FIFO verification platform before, using the OOP feature of SV to preliminarily verify FIFO, but there are many shortcomings, such as the structure is not standardized, the verification component cla ...

Posted by PupChow on Fri, 07 Feb 2020 09:10:51 -0800

Understand the structure and working principle of CPU in the code

I. Preface From the beginning of graduate school to half a year's work, I have been contacting MCU SOC controllers with CPU as the core, but because of professional reasons, I have no idea about the internal structure and working principle of CPU. Today, I broke the blind spot from a blog. It is hereby declared that the design idea and code of ...

Posted by cottonbuds2005 on Mon, 03 Feb 2020 01:53:57 -0800

[GA]Verilog 60s stopwatch timer (maximum timetable up to 9 min)

[GA]Verilog 60s stopwatch timer 1. Citation This experiment is based on an optional topic during my undergraduate course Number of Junctions.Since the upload was post-perception and the school had recycled the toe plates, it was impossible to post an effect picture of the code results in this article, but the final effect has been tested and ca ...

Posted by kruahsohr on Sun, 15 Dec 2019 00:44:15 -0800

Open square verilog code

Catalog 1. Description of successive approximation algorithm 2.Verilog implementation 3. Written ...

Posted by doox00 on Fri, 25 Oct 2019 07:37:15 -0700

# Jiangxi CCPC Provincial Competition-Rng (Probability+Inverse Element)

Jiangxi CCPC Provincial Competition-Rng (Probability+Inverse Element) Title: Given an n, choose a R1 between [1,n], choose an L1 between [1,R1], get an interval [L1,R1], get an interval [L2,R2], and ask the probability of intersection of two intervals to model 1e9+7. Train of thought 1: Discuss in different situations, the use of conditional ...

Posted by kashmirekat on Mon, 14 Oct 2019 12:35:53 -0700

Spring Boot + Sharing-JDBC Read-Write Separation

This paper uses Sharding-JDBC to realize read-write separation based on entOS 7 + MySQL 5.7 I. MySQL Installation and Configuration 1.1 installation Execute orders in turn: sudo wget -i -c http://dev.mysql.com/get/mysql57-community-release-el7-10.noarch.rpm sudo yum -y install mysql57-community-release-el7-10.noarch.rpm sudo yum ...

Posted by dagee on Mon, 14 Oct 2019 08:53:24 -0700

Luogu P1991 Wireless Communication Network

Topic portal Ideas for solving problems: For the first time, I looked at the question, a little confused, I do not know what this question is asking for. Then I looked at the algorithm label, the smallest spanning tree, and then I looked at the question again, as if that was the case. This question is actually a board question of the smalles ...

Posted by iron999mike on Sat, 12 Oct 2019 13:53:27 -0700

Small Problems of VGA Display Pictures Based on FPGA Driver

In the process of learning VGA to display pictures, I encountered a small problem. I opened a 60x60 box on the display screen and put a picture in it, but the final result is shown in the following figure. There is a vertical black edge, look at the code, analyze the logic is no problem, but look at this display that must be a problem, and then ...

Posted by abakash on Wed, 22 May 2019 16:12:36 -0700

Example 4 of PCIE_DMA: Transplantation of xapp1052 on Xilinx 7 Series (KC705/VC709)FPGA

1: Preface During this period, a friend and Wechat asked for help in debugging a PCIe card. The acquisition card uses xilinx xc7k410t as the controller and the upper computer is XP system. The original driving and testing software is based on xapp1052. As we all know, after Xilinx upgraded to Series 7, the original pcie ip core trn interface h ...

Posted by buzzby on Mon, 04 Mar 2019 21:51:22 -0800